* The M4 P core grows from an already big 9 wide decode to a 10 wide decode.
* Integer Physical Register File has grown by 21% while Floating Point Physical Register File has shrunk.
* The dispatch buffer for the M4 has seen a significant boost for both Int and FP units ranging from 50-100% wider structures. (Seems to resolve a major issue for M3 since M3 increased no of ALU units but IPC increases were minimal (3%) since they couldn’t be kept fed)
* Integer and Load store schedulers have also seen increases by around 11-15%.
* Seems to be some changes to the individual capabilities of the execution units as well but I do not have a clear picture on what they mean.
* Load Store Queue and STQ entries have seen increases by around 14%.
* The ROB has grown by around around 12% while PRRT has increased by around 14%